This invention relates to a programmable semiconductor integrated circuit.
In recent years, Application Specified ICs (hereinafter referred to as ASICs) have been widely used as small quantity products and/or ICs for prototyping. For ASICs, there are ASICs customized so as to become in correspondence with the specification that consumers or customers request at the mask level, such as, for example, Gate Array (hereinafter referred to as GA) or Standard Cell (hereinafter referred to as SC), and ASICs customized after they have been at hands of customers or consumers, such as, for example, Programmable Logic Array (PLA).
In the case of GA and/or SC, there is a feature that it realizes any logic circuits, but cost of development is high and term of development is long. On the other hand, in the case of PLA, cost is low and term of development is short, but there is limitation in kind of circuits which can be realized.
In view of the above, there have been developed, with a view to compensating the drawbacks of the both techniques mentioned above, devices called Field Programmable Gate Array (hereinafter referred to as FPGA), which are capable of realizing any logic circuits as in the case of GA, and are permitted to be customized after they have been at hands of consumers or customers as in the case of PLA. In FPGA, basic (fundamental) cells each comprised of a transistor or plural transistors, and wiring and program elements for connecting between those basic cells are arranged in advance. Customers or consumers make programming with respect to program elements to thereby obtain circuits of desired functions.
However, in the conventional FPGA, there was a problem that area efficiency is low when compared to customized circuits having the same function. Particularly, when attempt is made to realize circuits in which elements are regularly arranged like in memory circuits, utilization efficiency of wiring resource was also disadvantageously lowered.